Hook:
$100 billion. That is the price tag TSMC attached to its US expansion pledge last week. The largest single foreign direct investment in semiconductor history. Markets cheered. Politicians celebrated. But the raw numbers tell a different story: TSMC’s Arizona fab costs 40-50% more than equivalent capacity in Taiwan. The first phase already saw cost overruns from $12 billion to over $40 billion. Ledgers do not lie, only the auditors do. This is not a victory lap. It is a hedged bet against geopolitical tail risk, and the premium is being paid by shareholders.
Context:
TSMC’s commitment to build up to six fabs across three sites in Arizona, producing 3nm and 5nm nodes, is ostensibly a response to CHIPS Act incentives and US customer demand from Apple, NVIDIA, AMD, and Qualcomm. The first fab, originally slated for 2024 production, now targets 2025-2026. The second was announced later for 3nm. The third and fourth are speculative. The company plans to ship roughly 300,000 12-inch equivalent wafers per month at full build-out, which would represent about 30% of TSMC’s total capacity by revenue. US customers already account for 65%+ of TSMC’s top line. The narrative is simple: bring manufacturing closer to the consumer, reduce supply chain risk, secure AI/HPC growth. But the execution reality is far messier.
Beta is the tax you pay for ignorance. And the market is pricing this expansion as if it will mirror TSMC’s Taiwanese efficiency. It will not.
Core:
Let’s quantify the structural disadvantages. First, construction costs. According to industry benchmarks, building a Class 1 cleanroom fab in the US costs $1,200-$1,500 per square foot versus $800-$1,000 in Taiwan. Permitting, union labor, and environmental compliance add 12-18 months to the timeline. TSMC’s Arizona fab already missed its initial 2024 production target by at least 18 months. Every delay compresses the ROI window for an asset that depreciates rapidly.
Second, talent. The US has roughly 1,200 semiconductor engineering graduates per year. Taiwan produces around 6,000. The gap is not just quantity but culture. Taiwanese engineers routinely work 60-hour weeks, rotate night shifts, and accept a hierarchical management style. US engineers demand work-life balance, competitive stock packages, and union protections. TSMC has already faced labor disputes in Arizona over these exact issues. They have flown in hundreds of Taiwanese engineers—but each relocation costs $200K-$300K and faces visa caps. The yield ramp for the first fab is tracking 20-30% slower than identical fabs in Taiwan. Yield is the only truth in a fragmented chain. If Arizona’s N4P process does not hit 80%+ within 12 months of production, customers will hesitate to commit long-term.
Third, supply chain localisation. The US currently lacks domestic suppliers for high-purity chemicals (like hydrogen peroxide and fluorine), specialty gases (like xenon and neon), and advanced CMP slurries. These are sourced from Japan, Germany, and Taiwan. Building a local ecosystem takes a decade. Until then, TSMC’s US fabs will import critical materials, adding 5-8% to wafer costs and exposing them to logistics shocks.
Now calculate the financial impact. TSMC’s overall gross margin sits at 55-60%. Analysts estimate the Arizona fabs will struggle to exceed 40% gross margin in the first five years due to depreciation, higher OpEx, and lower pricing power (since customers expect some discount for onshore production). The capital expenditure-to-revenue ratio for the US expansion alone could push TSMC’s total CapEx/Revenue from 40% to 55%, free cash flow will compress. The $100 billion pledge is spread over 10-15 years, but the cash outflows are front-loaded. If CHIPS Act subsidies (only $6.6 billion confirmed so far) get reduced under a new administration, the net present value turns negative.
Contrarian:
The mainstream narrative says this reduces geopolitical risk. I argue the opposite—it increases TSMC’s exposure to US policy risk. Once billions are sunk into Arizona, TSMC becomes hostage to trade policy, export controls, and labour regulations. If the next US administration slaps tariffs on imported chips from Taiwan (a real possibility), TSMC’s US fabs cannot replace Taiwanese output quickly enough. The company will be forced to choose between margin compression and customer defection.
Furthermore, calling this “reshoring” is misleading. TSMC retains 100% of 3nm and 2nm R&D and initial production in Taiwan. The US fabs will run on recipes, masks, and IP that still originates in Hsinchu. The "silicon shield" argument—that TSMC’s entanglement with US customers protects Taiwan—assumes rational actors. History does not support that assumption. If conflict escalates, the US fabs become stranded assets: no IP, no qualified engineers, no advanced packaging (which TSMC has not yet committed to build in the US). The US is buying insurance, but the premium is paid by TSMC’s margins, not taxpayers.
Volatility is not risk; impermanent loss is. Here, the impermanent loss is the decades of ecosystem advantages Taiwan holds. You cannot replicate a semiconductor cluster overnight with money alone. US customers like Apple and NVIDIA will benefit from lower shipping costs and faster iteration, but they will pay the same wafer price (plus a premium for onshore) with no guarantee of exclusivity. Intel Foundry and Samsung are also building in the US, creating a three-way competition for talent, subsidies, and water rights.
Takeaway:
TSMC’s $100 billion US bet is a rational hedge against an existential tail event, not an efficiency play. The smart money watches the yield curves in Arizona and the subsidy flow from Washington. If the second fab’s timeline slips again, or if the first fab’s yield stays below 60% for more than two quarters, the market will reprice TSMC’s US assets as a drag, not a driver. Efficiency demands the elimination of sentiment. The sentiment is bullish. The data says caution. Watch the numbers, not the ribbon cuttings.